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2006 Rochester Computational Science and Education Conference

Future High-Performance Computing

Author: Olaf O. Storaasli (Oak Ridge National Laboratory, Future Technologies Group, Computer Science & Mathematics Division)

Abstract

High-Performance Computing (HPC) is undergoing revolutionary changes from its underlying hardware to the software used to solve applications. This talk discusses the myriad of competing hardware architecture options (multi-core, Field Programmable Gate Array (FPGA), Graphics, Cell, Optical and Quantum Processors) offering the potential to speed calculations by orders of magnitude IF applications are coded (in parallel) to harness their potential. Coding such new architecture devices as FPGA coprocessors is currently dominated by specialized, esoteric design languages (VHDL, Verilog), far to low-level for most high- level HPC application developers. ORNL is exploring approaches to overcome this significant software restriction. Such a software breakthrough is key to reaping significant performance gains, enabling the solution of grand-challenge applications, never before attempted.

Dr. Olaf O. Storaasli recently joined the Future Technology Group as a Distinguished Research Scientist at Oak Ridge National Laboratory after his career as a NASA Senior researcher developing algorithms and architectures for High-Performance computers (including advanced architectures based on FPGAs). Dr. Storaasli earned his PhD in Engineering Mechanics from North Carolina State University and has served on the Adjunct Graduate faculty of George Washington University and Christopher Newport University. (More info)